PPT-Diffusion Break-Aware Leakage Power Optimization and Detailed Placement in Sub-10nm VLSI
Author : cheryl-pisano | Published Date : 2019-11-03
Diffusion BreakAware Leakage Power Optimization and Detailed Placement in Sub10nm VLSI Sun ik Heo Andrew B Kahng Minsoo Kim and Lutong Wang UC San Diego Samsung
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Diffusion Break-Aware Leakage Power Optimization and Detailed Placement in Sub-10nm VLSI: Transcript
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